1. Field of the Invention
Example, non-limiting embodiments of the present invention relate generally to a semiconductor device such as a field effect transistor (for example) and a method of manufacturing the semiconductor device. More particularly, example, non-limiting embodiments of the present invention relate to a fin field effect transistor (FinFET) that may have a fin structure and a method of manufacturing the fin field effect transistor.
2. Description of the Related Art
A semiconductor device may be highly integrated so that an area of an active region may be reduced. Accordingly, a channel length of a metal oxide semiconductor transistor (MOS), for example, formed on the active region may also be reduced. When the channel length of the MOS transistor is reduced, source/drain regions may have an influence on an electric field and/or a voltage in a channel region. This phenomenon may be referred to as a short channel effect. In addition, a channel width may be reduced proportionally to the reduction of the active region so that a threshold voltage may be increased. This phenomenon may be referred to as a narrow channel effect or a narrow width effect. Further, a carrier mobility of the transistor may be decreased so that a current drivability may also decrease. The decrease of the current drivability may deteriorate an operational capacity of the transistor.
Reducing the above-described problems has been the subject of development. According to such development, a semiconductor device such as a FinFET may have a fin structure formed on a semiconductor substrate. Conventional methods are known for forming a FinFET on a bulky semiconductor substrate. In addition, conventional structures may implement a planarized silicon fin device.
Notwithstanding conventional developments, it may be desirable to provide a semiconductor device capable of reducing the above-described problems, which may arise due to a scaling-down, for example.